1. Field of the Invention
The present invention relates to computer-aided design and design analysis tools for electronic integrated circuits, specifically computer aided design tools and methods for providing a circuit designer with improved means for designing physical circuit layouts.
2. Description of the Related Art
Electronic circuits form the building blocks of electronic devices. Electronic integrated circuits (“ICs”) based on silicon, or other semiconductor, technologies have revolutionized many aspects of everyday life because of high functionality, compact size, low power consumption, and low cost. Whereas conventional electronic circuits usually embody from a few to hundreds of electronic components, including ICs, a single IC can embody from a few to many millions of electronic components such as transistors, diodes, resistors, capacitors, and many others, along with associated interconnections. The various components for an IC are fabricated on a single semiconductor wafer (“wafer”) with a typical diameter of two to twelve inches or more, prior to separation into individual ICs. Photolithographic techniques can be used to selectively apply processing steps to the wafer such as: selective epitaxial growth; dopant diffusion; ion-implantation; etching or milling; deposition of various materials, including insulating materials and conductive materials for contacts and interconnection; and others. Ordinarily, several sequential processing steps are necessary to fabricate an IC. Many of these steps use the patterning of a photoresist layer that is temporarily applied to the surface of a wafer. This patterning is typically accomplished by projecting light of various wavelengths, or x-rays, through a photo mask with a desired transparent and opaque pattern that is unique to a particular IC design and process step. Another method for patterning photoresist on a wafer is the direct writing of the pattern using a modulated electron, or other particle, beam. In such cases, files of computer instructions for generating the patterns substitute for actual photo masks.
Together, the set of all masks used to fabricate a particular circuit is referred to as a “mask set.” For ICs, depending on the IC fabrication process, mask sets may contain from one to over twenty masks. Sometimes, particularly in the past for smaller diameter wafers, wafers with a photosensitive coating (“photoresist”) were exposed to light shown through masks in direct contact with the wafers. This is called “contact lithography.” More commonly now, projection steppers step across a wafer using a mask referred to as a “reticule” to expose a repeated image (“field”). This is called “stepper lithography” or “projection lithography.” Because of projection, the image projected on the photoresist may be reduced in size from the physical image on the reticule, typically by a factor up to about 10. This allows for defining smaller features on an IC. Also, exposing a large surface area wafer sequentially in repeated fields reduces focus and alignment problems associated with the wafer's surface not being perfectly planar. Reticules typically contain a pattern for one processing step for an IC or multiple ICs, along with various process monitor test structures and alignment features.
Similarly, contact lithography is often used to pattern masks for fabricating interconnection, via holes, and other features for printed circuit boards (“PCB's—sometimes also referred to as printed wiring boards, “PWB”s). A mask set for a PCB typically comprises fewer photo masks that a mask set for an IC.
As circuit complexity and performance requirements increase, the need for matching the electrical characteristics of components to one another in a given circuit, particularly an IC, tends to become stricter. Good electrical characteristic matching is often important to achieve acceptable IC fabrication yield, or even adequate electrical performance at all. The capabilities of a given IC fabrication process to maintain tolerances for electrical characteristics of components are limited. This limitation results because all IC components are fabricated and interconnected simultaneously. No practical capability exists for measuring each device on an individual basis and then accepting or rejecting that device for use in a particular circuit, as is the case for circuits assembled of discrete components and PCBs. Fortunately the electrical characteristics of similar components at different positions within a given IC tend to match one another more often than randomly selected discrete components for assembly with a PCB. But this matching of IC components is not perfect. Spatially non-uniform processing conditions during wafer fabrication often result in component characteristic variations within a given IC. Sometimes the variations in component electrical characteristics appear randomly over the surface of a wafer. At other times, the variations may appear as gradients across the wafer surface, on a larger or smaller area scale. Variations in component electrical characteristics may also occur during circuit operation due to thermal and electrical environment variations arising from the operation of other components and interconnections within the circuit.